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Model Reduction for Circuit Simulation by Benner, Peter. Publication: . XIII, 315p. Availability: Copies available: AUM Main Library (1),
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Generating Analog IC Layouts with LAYGEN II by Martins, Ricardo M. F. Publication: . XI, 98 p. Availability: Copies available: AUM Main Library (1),
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From Boolean Logic to Switching Circuits and Automata by Stanković, Radomir S. Publication: . XVIII, 214p. 135 illus., 70 illus. in color. Availability: Copies available: AUM Main Library (1),
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Synthesis of Computational Structures for Analog Signal Processing by Popa, Cosmin Radu. Publication: . XV, 449p. 385 illus. Availability: Copies available: AUM Main Library (1),
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Bond Graph Modelling of Engineering Systems by Borutzky, Wolfgang. Publication: . XVI, 435p. 333 illus. Availability: Copies available: AUM Main Library (1),
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Switched Time-Delay Systems by Mahmoud, Magdi S. Publication: . X, 420p. 49 illus. Availability: Copies available: AUM Main Library (1),
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Dynamics of Nonlinear Time-Delay Systems by Lakshmanan, Muthusamy. Publication: . XVII, 313 p. Availability: Copies available: AUM Main Library (1),
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